Hardware Registers
Overview
The Pokemon Mini maps $2000 ~ $20FF as hardware control registers. This area is reserved for hardware related functions such as video, audio, general purpose timers, hardware I/O and system control.
Much of this address space is mapped as Open-Bus, leading us to beleive that this area is not used for any purpose. Other areas respond to requests but their purpose is yet undetermined.
Registers tend to be controlled on a bit level, so for the sanity purposes, they will be broken down to this level. At any point they are shown spanning multiple columns, that indicates that it is a multi-bit value and should be treated as if they were a number.
The bits themselves come in four flavors: Read-only, Write-Only, Read-Write, and S-R Strobe. Write-Only registers typically return a zero value, and are generally only used for things such as resetting timers. S-R Strobes are used for clearing interrupt events, writting a logical '1' to any bit that is set will result in a bit being cleared, where as '0' leaves them unchanged. Unused bits always return '0'.
Any register not included on this list reads as Open-Bus and will be excluded unless a function has otherwise been determined.
Register Mapping
| Unused | Read/Write | Read Only | Write Only | S-R Strobe | Read/Write (BIOS, Software only) | Unknown (Read/Write) | Unknown (Weird) | Unknown (Unused) |
| Address | Register | Const Name | Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
|---|---|---|---|---|---|---|---|---|---|---|
| $00 | System Control 1 | SYS_CTRL1 | Startup Contrast | Cartridge I/O Enable |
LCD I/O Enable |
|||||
| $01 | System Control 2 | SYS_CTRL2 | Ram vector | Int abort | Enable cart interrupts | Power on reset | Cart type | |||
| $02 | System Control 3 | SYS_CTRL3 | Cart power state | Cart power required | Suspend mode | ??? | RTC Timer valid | ??? | ||
| $08 | Second Counter Control | SEC_CTRL | Reset | Enable | ||||||
| $09 | Second Counter Low | SEC_CNT_LO | Counter | |||||||
| $0A | Second Counter Middle | SEC_CNT_MID | Counter | |||||||
| $0B | Second Counter High | SEC_CNT_HI | Counter | |||||||
| $10 | Battery Sensor | SYS_BATT | Low Battery | Battery ADC control | Battery ADC threshold value | |||||
| $18 | Timer 1 Prescalars | TMR1_SCALE | Enable Hi | Hi Scalar | Enable Lo | Lo Scalar | ||||
| $19 | Timers Osc. Enable Timer 1 Osc. Select |
TMR1_ENA_OSC TMR1_OSC |
Enable Osc. 1 | Enable Osc. 2 | 2nd Osc. (Hi) | 2nd Osc. (Lo) | ||||
| $1A | Timer 2 Prescalars | TMR2_SCALE | Enable Hi | Hi Scalar | Enable Lo | Lo Scalar | ||||
| $1B | Timer 2 Osc. Select | TMR2_OSC | 2nd Osc. (Hi) | 2nd Osc. (Lo) | ||||||
| $1C | Timer 3 Prescalars | TMR3_SCALE | Enable Hi | Hi Scalar | Enable Lo | Lo Scalar | ||||
| $1D | Timer 3 Osc. Select | TMR3_OSC | 2nd Osc. (Hi) | 2nd Osc. (Lo) | ||||||
| $20 | IRQ Priority 1 | IRQ_PRI1 | IRQ $03 ~ $04 | IRQ $05 ~ $06 | IRQ $07 ~ $08 | IRQ $09 ~ $0A | ||||
| $21 | IRQ Priority 2 | IRQ_PRI2 | IRQ $0B ~ $0E | IRQ $13 ~ $14 | IRQ $15 ~ $1C | IRQ ??? ($1D ~ $1F?) | ||||
| $22 | IRQ Priority 3 | IRQ_PRI3 | IRQ $0F~$10 | |||||||
| $23 | IRQ Enable 1 | IRQ_ENA1 | IRQ $03 | IRQ $04 | IRQ $05 | IRQ $06 | IRQ $07 | IRQ $08 | IRQ $09 | IRQ $0A |
| $24 | IRQ Enable 2 | IRQ_ENA2 | IRQ $0B | IRQ $0C | IRQ $0D | IRQ $0E | IRQ $13 | IRQ $14 | ||
| $25 | IRQ Enable 3 | IRQ_ENA3 | IRQ $15 | IRQ $16 | IRQ $17 | IRQ $18 | IRQ $19 | IRQ $1A | IRQ $1B | IRQ $1C |
| $26 | IRQ Enable 4 | IRQ_ENA4 | IRQ $0F | IRQ $10 | IRQ ??? | IRQ ??? | IRQ $1D | IRQ $1E | IRQ $1F | |
| $27 | IRQ Active 1 | IRQ_ACT1 | IRQ $03 | IRQ $04 | IRQ $05 | IRQ $06 | IRQ $07 | IRQ $08 | IRQ $09 | IRQ $0A |
| $28 | IRQ Active 2 | IRQ_ACT2 | IRQ $0B | IRQ $0C | IRQ $0D | IRQ $0E | IRQ $13 | IRQ $14 | ||
| $29 | IRQ Active 3 | IRQ_ACT3 | IRQ $15 | IRQ $16 | IRQ $17 | IRQ $18 | IRQ $19 | IRQ $1A | IRQ $1B | IRQ $1C |
| $2A | IRQ Active 4 | IRQ_ACT4 | IRQ $0F | IRQ $10 | IRQ ??? | IRQ ??? | IRQ $1D | IRQ $1E | IRQ $1F | |
| $30 | Timer 1 Control (Lo) | TMR1_CTRL_L | 16-bit Mode | ??? | Enable | Reset | ??? | |||
| $31 | Timer 1 Control (Hi) | TMR1_CTRL_H | ??? | Enable | Reset | ??? | ||||
| $32 | Timer 1 Preset (Lo) | TMR1_PRE_L | Preset | |||||||
| $33 | Timer 1 Preset (Hi) | TMR1_PRE_H | Preset | |||||||
| $34 | Timer 1 Pivot (Lo) | TMR1_PVT_L | Pivot | |||||||
| $35 | Timer 1 Pivot (Hi) | TMR1_PVT_H | Pivot | |||||||
| $36 | Timer 1 Count (Lo) | TMR1_CNT_L | Count | |||||||
| $37 | Timer 1 Count (Hi) | TMR1_CNT_H | Count | |||||||
| $38 | Timer 2 Control (Lo) | TMR2_CTRL_L | 16-bit Mode | ??? | Enable | Reset | ??? | |||
| $39 | Timer 2 Control (Hi) | TMR2_CTRL_H | ??? | Enable | Reset | ??? | ||||
| $3A | Timer 2 Preset (Lo) | TMR2_PRE_L | Preset | |||||||
| $3B | Timer 2 Preset (Hi) | TMR2_PRE_H | Preset | |||||||
| $3C | Timer 2 Pivot (Lo) | TMR2_PVT_L | Pivot | |||||||
| $3D | Timer 2 Pivot (Hi) | TMR2_PVT_H | Pivot | |||||||
| $3E | Timer 2 Count (Lo) | TMR2_CNT_L | Count | |||||||
| $3F | Timer 2 Count (Hi) | TMR2_CNT_H | Count | |||||||
| $40 | 256Hz Timer Control | TMR256_CTRL | Reset | Enable | ||||||
| $41 | 256Hz Timer Counter | TMR256_CNT | Count | |||||||
| $44 | Unknown | ??? | ??? | ??? | ||||||
| $45 | Unknown | ??? | ??? | ??? | ??? | ??? | ||||
| $46 | Unknown | ??? | ||||||||
| $47 | Unknown | ??? | ??? | |||||||
| $48 | Timer 3 Control (Lo) | TMR3_CTRL_L | 16-bit Mode | ??? | Enable | Reset | ??? | |||
| $49 | Timer 3 Control (Hi) | TMR3_CTRL_H | ??? | Enable | Reset | ??? | ||||
| $4A | Timer 3 Preset (Lo) | TMR3_PRE_L | Preset | |||||||
| $4B | Timer 3 Preset (Hi) | TMR3_PRE_H | Preset | |||||||
| $4C | Timer 3 Pivot (Lo) | TMR3_PVT_L | Pivot | |||||||
| $4D | Timer 3 Pivot (Hi) | TMR3_PVT_H | Pivot | |||||||
| $4E | Timer 3 Count (Lo) | TMR3_CNT_L | Count | |||||||
| $4F | Timer 3 Count (Hi) | TMR3_CNT_H | Count | |||||||
| $50 | Unknown | ??? | ||||||||
| $51 | Unknown | ??? | ??? | |||||||
| $52 | Key-Pad Status (Active 0) | KEY_PAD | Power | Right | Left | Down | Up | C | B | A |
| $53 | Cart Bus | CART_BUS | CARD_N | |||||||
| $54 | Unknown | ??? | ??? | ??? | ??? | |||||
| $55 | Unknown | ??? | ??? | |||||||
| $60 | I/O Direction Select | IO_DIR | ??? | ??? | IR Disable | Rumble | EEPROM Clock | EEPROM Data | IR Rx | IR Tx |
| $61 | I/O Data Register | IO_DATA | ??? | ??? | IR Disable | Rumble | EEPROM Clock | EEPROM Data | IR Rx | IR Tx |
| $62 | Unknown | ??? | ??? | |||||||
| $70 | Audio Control | AUD_CTRL | ??? | Mutes audio if not 0!? | ||||||
| $71 | Audio Volume | AUD_VOL | Cart Power (1=Off;0=On) | Volume | ||||||
| $80 | PRC Stage Control | PRC_MODE | Map Size | Ena Copy | Ena Sprites | Ena Map | Invert Map | |||
| $81 | PRC Rate Control | PRC_RATE | Frame counter | Rate divider | ??? | |||||
| $82 | PRC Map Tile Base Low | PRC_MAP_LO | Map Tile Base | |||||||
| $83 | PRC Map Tile Base Middle | PRC_MAP_MID | Map Tile Base | |||||||
| $84 | PRC Map Tile Base High | PRC_MAP_HI | Map Tile Base | |||||||
| $85 | PRC Map Vertical Scroll | PRC_SCROLL_Y | Map Scroll Y | |||||||
| $86 | PRC Map Horizontal Scroll | PRC_SCROLL_X | Map Scroll X | |||||||
| $87 | PRC Sprite Tile Base Low | PRC_SPR_LO | Sprite Tile Base | |||||||
| $88 | PRC Sprite Tile Base Middle | PRC_SPR_MID | Sprite Tile Base | |||||||
| $89 | PRC Sprite Tile Base Hi | PRC_SPR_HI | Sprite Tile Base | |||||||
| $8A | PRC Counter | PRC_CNT | Count | |||||||
| $8B | Unused | |||||||||
| $8C | Unused | |||||||||
| $8D | Unused | |||||||||
| $8E | Unused | |||||||||
| $8F | Unused | |||||||||
| $F0 | Unused | |||||||||
| $F1 | Unused | |||||||||
| $F2 | Unused | |||||||||
| $F3 | Unused | |||||||||
| $F4 | Unused | |||||||||
| $F5 | Unused | |||||||||
| $F6 | Unused | |||||||||
| $F7 | Unused | |||||||||
| $FE | LCD Raw Control Byte | LCD_CTRL | LCD Control I/O | |||||||
| $FF | LCD Raw Data Byte | LCD_DATA | LCD Data I/O | |||||||